Neil Robertson (@neirober)
In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter. Now let’s look at this PLL in the Z-domain [1, 2]. We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ.
Having a Z-domain model of the DPLL will allow us to do three things:Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural...
Figure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.
One application of the DPLL is to recover the timing in a digital...
No Threads Found
Use this form to contact neirober
Before you can contact a member of the *Related Sites:
- You must be logged in (register here)
- You must confirm you email address